A METHOD OF FORMING CONTACT PLUG OF SEMICONDUCTOR DEVICE

摘要

PURPOSE: A method for forming a contact plug of a semiconductor device is provided to minimize a damage of an interlayer dielectric of a low stepped region by performing a multi-CMP(Chemical Mechanical Polishing) process. CONSTITUTION: A gate electrode layer(102) including a polysilicon layer pattern(102a), a silicide layer pattern(102b), and an insulating layer pattern(102c) is formed on a cell array region of a semiconductor substrate(100) including the cell array region and a peripheral circuit region. An interlayer dielectric(104) is formed on the whole surface of semiconductor substrate(100). A contact hole is formed by etching the interlayer dielectric(104) of the first region. A conductive layer(108) is formed on the interlayer dielectric(104). The interlayer dielectric(104) of the cell array region is exposed by polishing the conductive layer(108). The interlayer dielectric(104) of the cell array region is polished by using the remaining conductive layer(108) of the peripheral circuit region as a mask. The conductive layer(108) of the cell array region and the peripheral circuit regions is polished in order not to etch fully the conductive layer(108) of the peripheral circuit region.