SELF BURN-IN CIRCUIT FOR SEMICONDUCTOR MEMORY DEVICE

摘要

PURPOSE: A self burn-in circuit within a semiconductor memory is provided to write a data to all memory cells by only applying one column address. CONSTITUTION: In the circuit, a signal generator(100) generates a burn-in mode signal(BI_mode) for informing a burn-in mode, a burn-in RAS(Row Address Strobe) signal(BI_RAS) for activating word lines, a burn-in address signal(BI_RADR), an enable signal(BI_SAEN) for enabling a sense amplifier during the burn-in mode, an equalization signal(BI_BLEQ) for equalizing bit lines during the burn-in mode, a write enable signal(Write_enable) and a selection signal(BI_YSEL) for selecting a column line during the burn-in mode. The first multiplexor(110) selectively outputs a normal RAS signal(N_RAS) and the burn-in RAS signal(BI_RAS). The second multiplexor(120) selectively outputs a normal address signal(N_RADR) and the burn-in address signal(BI_RADR). A row controller(130) drives word lines by decoding output signals from the first and second multiplexors(110,120). The third multiplexor(140) selectively applies an equalization signal(N_BLEQ) for equalizing bit lines during a normal mode and the equalization signal(BI_BLEQ) to corresponding bit lines. The fourth multiplexor(150) selectively outputs an enable signal(BI_SAEN) for enabling a sense amplifier during the normal mode and the enable signal(BI_SAEN). NAND gates(ND1-NDm) perform NAND operations to selection signals(Normal Y_SEL1-m) for selecting a column line during the normal mode and the selection signal(BI_YSEL).