| 摘要 |
PROBLEM TO BE SOLVED: To dispense with the adjustment of a clock reproducing circuit for data communication equipment, for which a bit cycle system is adopted, to make the circuit into one chip with a simple configuration without requiring noise measures as well. SOLUTION: Edge of reception data is detected by an edge detecting circuit 1, and the oscillated output of a fixed oscillator 2 is fetched into plural latches 4 composing shift registers 5 of plural steps, while dividing its frequency through a binary counter 3. At this time, each time a detecting signal arrives from the edge detecting circuit 1, the value of the binary counter 3 is shifted to the latch 4 of the following step. Then, the output of each latch 4 is inputted to an average value calculating circuit 6, an average value is calculated, that output is compared with the output of the binary counter 3 by a comparator circuit 8 and when they are coincident, a clock is generated and used as a reproducing clock for data read. |
