发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT AND IC CARD |
摘要 |
PROBLEM TO BE SOLVED: To reduce a through current in a CMOS output buffer circuit. SOLUTION: An output buffer circuit is provided with a plurality of CMOS output circuits 1. First and second load MOS transistors (ELPM and ELNM) are provided in power supply wirings 2 and 3. The current supply capability of each load MOS transistor is equal to or more than the current supply capability of one CMOS output circuit and is set smaller than the total current supply ability of all the CMOS output circuits sharing both load MOS transistors. When the plurality of CMOS output circuits simultaneously perform an output inversion operation, a current decided by the size of both load transistors is distributed to the plurality of the CMOS output circuits, the current flowing to one CMOS output circuit at the time is smaller than the current when only one CMOS output circuit performs an inversion operation and it reduces the through current in a transient response operation as a whole.
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申请公布号 |
JP2000124782(A) |
申请公布日期 |
2000.04.28 |
申请号 |
JP19980291935 |
申请日期 |
1998.10.14 |
申请人 |
HITACHI LTD;HITACHI HOKKAI SEMICONDUCTOR LTD |
发明人 |
MIYAWAKI YASUHARU;KUDO MASAHIRO |
分类号 |
H03K17/16;H03K17/687;H03K17/693;H03K19/0175;(IPC1-7):H03K17/16;H03K19/017 |
主分类号 |
H03K17/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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