发明名称 MANUFACTURE OF SEMICONDUCTOR PACKAGE
摘要 <p>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor package, whereby mass productivity is high and material cost, assembling cost and testing cost can be reduced. SOLUTION: A wafer has a plurality of chips, each of which has a bump electrodes 42. A substrate has a plurality of packaging boards, which have electrode pads 52 on a plane a and electrode pads 53 connected to the electrodes pads 52 on a plane b and are respectively arranged, corresponding to the chips. The chips and the substrate are bonded with an epoxy adhesive 60, so that corresponding chips face the package boards and corresponding bump electrodes 42 are connected to the electrode pads 52. Solder bumps 54 are formed on the electrode pads 53. The bonded wafers and substrate are cut into chip units, and the cut faces are coated with epoxy resin.</p>
申请公布号 JP2000124238(A) 申请公布日期 2000.04.28
申请号 JP19980295499 申请日期 1998.10.16
申请人 FUJITSU LTD 发明人 SEYAMA KIYOTAKA
分类号 H01L21/56;H01L21/301;(IPC1-7):H01L21/56 主分类号 H01L21/56
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