发明名称 METHOD OF FORMING DRAM CELL CAPACITOR
摘要 PURPOSE: A method for forming a DRAM cell capacitor is provided to be self-aligned to allow a storage node and a buried contact pad in the capacitor to have a sufficient overlapping margin. CONSTITUTION: A method for forming a DRAM cell capacitor provides a semiconductor substrate(21) having a storage node junction(22), a storage node contact pad(23) formed on the junction, and an interlayer dielectric(24) covering the contact pad. At least one insulating layers(29) are formed on the interlayer dielectric. The height of the insulating layer is same to or higher than the height of a storage node pattern of the cell capacitor. At least one insulating layer on the contact pat are etched to form an upper via, where an upper surface of the interlayer dielectric is exposed at the bottom of the via. A conductive film is formed on th entire surface of the resulting structure and is then etched to form a spacer on the sidewall of the via. The interlayer dielectric at the bottom of the upper via is sequentially etched using the spacer as a mask to form a lower via, where the surface of the contact pad is exposed at the bottom of the lower via.
申请公布号 KR100256059(B1) 申请公布日期 2000.05.01
申请号 KR19970052475 申请日期 1997.10.14
申请人 SAMSUNG ELECTRONICS CO.,LTD. 发明人 KIM, HYOUNG-SUB
分类号 H01L27/108;H01L21/8242;(IPC1-7):H01L27/108 主分类号 H01L27/108
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