发明名称 INTERRUPTION CONTROLLER AND INTERRUPTION CONTROL METHOD
摘要 PROBLEM TO BE SOLVED: To change the priority of an interruption request to CPU in accordance with the operation state of a system and to simplify a control processing. SOLUTION: Plural interruption request signals S1-S6 and a status signal S7 showing the operation state of CPU 2 are inputted to an interruption controller 1. The priority of the interruption request signals inputted by the interruption request mask registers 3 and 4 is decided. The outputs of the interruption request mask registers 3 and 4, the status signal and the inversed signal are inputted to AND gates 6-9, the outputs of the interruption request mask registers 3 and 4 are switched in accordance with the status signal S7 and an interruption request output signal is inputted to CPU 2 from OR gates 10 and 11. CPU 2 executes a processing from the interruption cause of the higher priority.
申请公布号 JP2000122963(A) 申请公布日期 2000.04.28
申请号 JP19980290656 申请日期 1998.10.13
申请人 CANON INC 发明人 KIMA KAZUHISA
分类号 G06F13/26;(IPC1-7):G06F13/26 主分类号 G06F13/26
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