| 摘要 |
PROBLEM TO BE SOLVED: To provide a data delay device which has a small circuit scale and is inexpensive without using any expensive FIFO memory. SOLUTION: This device is equipped with at least three write/read memories M1 to Mn, a writing control means 100 which writes input data Din from the respective memories in specific order (memory M1→memory M2→memory M3...) from the memory M1, a delay mews 200 which sets a delay timeΔt of output data Dout behind the input data Din, and a readout control means 300 which reads the output data Dout out of the respective memories in the specific order from the memory M1 the delay timeΔt later.
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