| 摘要 |
PROBLEM TO BE SOLVED: To provide a rake receiver capable of minimizing its area, gate delay and power consumption by defining an output from a N-th step adder as a specific correlation signal. SOLUTION: Necessary multiplication is executed by a pair of four multipliers. Especially an input to a first multiplier includes an x1(n) and an sI(k) of an 'I' component and an input to a second multiplier includes an xQ(n) and an sQ(k) of a 'Q' component. Next, products xI(n) sI(k) and xQ(n) sQ(k) are added at a first adder. Cross products xI(n) sQ(k) and sQ(n) sI(n) are added to a previous component RQ(k-1) at a second adder, and a Q-component of an output signal, that is, an RQ(k) is provided. Next, these components are impressed as an input to a pair of D flip-flops. Then, in this case, the output from the N-th step is defined as a correlation signal which is indicated by a formula. |
