| 摘要 |
PROBLEM TO BE SOLVED: To obtain a semiconductor device and its layout method that has enhanced yield and superior reliability in a manufacturing process. SOLUTION: In the layout method for a semiconductor device, an aluminum wiring 16 for forming the metallic layer of a first layer is connected to a gate being formed by a polysilicon film 14 on a gate oxide film 12, at the same time is connected to an n+-type diffused layer for forming a P-N junction 20 between a substrate 11 of a p-well, and discharges electric charges generated in the plasma etching process for the aluminum wiring 16 at the P-N junction 20.
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