| 摘要 |
PROBLEM TO BE SOLVED: To provide a buffer circuit which can quickly confirm an operation despite the change of the CLK frequency by connecting a 2nd power supply to an output terminal with input of data of an H level and connecting the ground to the output terminal with input of data of an L level respectively when the frequency of a clock signal is higher than the reference frequency. SOLUTION: Once the data of an H level have been inputted to a data output circuit 11 of a buffer circuit, a P-channel transistor TR 17 and an N-channel TR 18 are turned on and off, respectively. Under such conditions, a test signal of an L level is inputted to a NAND circuit 21 in a normal mode where the operation of the buffer circuit is not confirmed. Thus, the circuit 21 outputs a signal of an H level regardless of the comparison result of a comparator 20. As a result, a P-channel TR 28 and an N-channel TR 29 of a driving capability changing circuit 22 are turned off and accordingly the circuit 22 is isolated.
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