发明名称 SEMICONDUCTOR INTEGRATED DEVICE
摘要 PROBLEM TO BE SOLVED: To compensate the dispersion of the characteristics of the drain current or the like of an FET for control resulting from a manufacture process by simple constitution. SOLUTION: To the gate of the FET 1 for high frequency amplification, a potential obtained by subtracting the portion of a voltage drop generated in a first resistor 22 by the drain current IDS2 of the FET 21 for bias from the potential GND of a first potential applying part 2a is applied. When the pinch off voltage of the FET 1 is shifted from a design value, the pinch off voltage of the FET 21 is also shifted similarly to it and the gate bias of the FET 1 is changed corresponding to it as well. Thus, the dispersion of the drain current IDS1 of the FET 1 due to the manufacture process is compensated by a gate bias circuit 20. Also, since the gate bias circuit 20 is provided with just two pieces of resistors, constitution is simple and a resistance value for obtaining a large compensation effect is easily set.
申请公布号 JP2000124749(A) 申请公布日期 2000.04.28
申请号 JP19980294812 申请日期 1998.10.16
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MOTOYOSHI KANAME;INAMORI MASAHIKO
分类号 H03F3/193;H03G3/10;(IPC1-7):H03F3/193 主分类号 H03F3/193
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