发明名称 |
ADDRESS CONTROL CIRCUIT FOR SEMICONDUCTOR MEMORY DEVICE |
摘要 |
PURPOSE: An address control circuit for semiconductor memory device is provided to decrease a pad size when manufacturing a memory chip to decrease a basic cost and prevent the decrease of the productivity by latching an address to a cell of an EEPROM and decreasing a size of an address pad and the number of a pin of a package. CONSTITUTION: An inputted address is provided to a comparator(19) through a shift register(17) and three signal lines(18) when an address of a memory chip with a clock signal(CK) and a chip selecting signal(CS) are inputted to a serial input terminal through a serial port. Each address latched in flash memory cells(M1-M3) of an address latch unit(20) on a printed circuit board is provided to the comparator(19). The comparator(19) compares the address inputted through the shift register(17) with the address inputted through the address latch unit(20).
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申请公布号 |
KR20000021372(A) |
申请公布日期 |
2000.04.25 |
申请号 |
KR19980040398 |
申请日期 |
1998.09.28 |
申请人 |
HYUNDAI ELECTRONICS IND. CO., LTD. |
发明人 |
JANG, SANG HWAN |
分类号 |
G11C16/06;G11C5/06;G11C8/00;(IPC1-7):G11C16/06 |
主分类号 |
G11C16/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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