发明名称 Continuously adjusted-bandwidth discrete-time phase-locked loop
摘要 A continuously adjusted bandwidth phase-locked loop is used by a B-CDMA TM receiver to correct for any deviation, or offset, that may exist between the received radio frequency (RF) carrier signal and the frequency of the first stage LO that converts the received RF carrier signal to an intermediate frequency (IF). The PLL in the receiver includes a filter with an adjustable bandwidth. A wider bandwidth is used during initial acquisition of the received signal. After the PLL has acquired the received carrier signal using the wider bandwidth, the bandwidth of the filter is gradually narrowed to provide a low steady-state error.
申请公布号 US6055231(A) 申请公布日期 2000.04.25
申请号 US19970871109 申请日期 1997.06.09
申请人 INTERDIGITAL TECHNOLOGY CORPORATION 发明人 MESECHER, DAVID K.;YANG, RUI;CERDA, RAMON
分类号 H04L27/22;H04B7/216;H04L27/00;H04L27/233;(IPC1-7):H04B7/216;H04J3/06 主分类号 H04L27/22
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