METHOD OF PLANARIZING SEMICONDUCTOR DEVICE

摘要

PURPOSE: A method of planarizing a semiconductor device is provided to overcome the step difference between DRAM cell area and a logic circuit area by maximizing a planarization characteristic of boron phosphorus silicate glass in a small area. CONSTITUTION: A method of planarizing a semiconductor device comprises the steps of: forming a first poly-layer and a second poly-layer on a semiconductor substrate, and evaporating a third poly-layer and a core oxidation layer to manufacture a cylinder-type capacitor; forming a third poly-layer mask to eliminate the entire region except the region in which a first metal contact will be formed and the cell region in which a capacitor will be formed; evaporating a fourth poly-layer after etching the core oxidation layer and the third poly-layer through the poly-layer mask and eliminating a photoresist layer; dry-etching the fourth poly-layer in a DRAM cell region only through the fourth poly-layer mask; cleaning the core oxidation layer in cleaning water by using as a barrier the fourth poly-layer existing in the fourth poly-layer mask and the boundary of the DRAM cell region and the peripheral circuit region; performing an insulating process of the capacitor after eliminating the fourth poly-layer mask photoresist layer and evaporating a fifth poly-layer; sequentially etching the fourth poly-layer and the capacitor insulation layer; and evaporating a planarization layer and flowing after eliminating the fifth poly-layer mask photoresist layer.