| 摘要 |
PROBLEM TO BE SOLVED: To provide a SRAM of small area which can be operated at a low voltage and with small power consumption. SOLUTION: A SRAM(static random access memory) cell 27 is constituted of first to fourth NMOS transistors 21-24 and first and second PMOS transistors 25 and 26. The first to fourth NMOS transistors 21-24 comprise DTMOS, whose channel regions are connected to gates. In this way, Vth at on position is made lower than in off position, and operations under low voltage become possible and the electric power consumption during operation is made low. The Vth in the off position is equal to that of a normal NMOS transistor and the leak current in the off position becomes equal to a conventional SRAM cell. The electrical power consumption during standby is not increased. Furthermore, since the on resistance is small and the speed of writing/reading is high, the region can be reduced, if the conventional speed of writing/reading is about conventional level. |
