| 摘要 |
PROBLEM TO BE SOLVED: To improve integration by forming a wiring with a fuse in a specified wiring layer and forming a dummy pattern formed of a metallic lamination film inside a wiring layer immediately below the fuse. SOLUTION: A plurality of isolation region 12a, 12b are formed on a silicon board 11 and a passive element comprising a diffusion layer and active elements of MOSFET 14 comprising diffusion layers 14a, 14b and a gate electrode 14C are constituted in an element formation region isolated by the isolation regions 12a, 12b. An aluminum dummy pattern 23a is formed to completely cover a diffusion layer and a gate electrode of the MOSFET 14 and partially overlap with the isolation regions 12a, 12b, a tungsten dummy pattern 25a is deposited thereon and a lamination dummy pattern 26 is formed. A metal fuse 30 by aluminum is formed immediately above the lamination dummy pattern 26 by using a photolithography method. |
