| 摘要 |
PROBLEM TO BE SOLVED: To obtain a small size memory cell including the gain which assures the RAM operation by comprising a read transistor, a write transistor and a coupling capacitance for controlling a voltage of memory cell node. SOLUTION: A ternary level word voltage pulse is impressed to a word line WL. In the non-selecting mode, the read operation is performed while the write transistor QW is non-conductive. Therefore, the read voltage selected is lower than the threshold voltage VTW of the transistor QW. The write voltage is selected higher than the high voltage (VDD)+VTW or higher. A capacitor C shifts the voltage written into the memory node N to the negative side when the write operation is completed and the word voltage is changed to shift to the non-selecting condition. If a selection transistor is not provided, a memory cell can be selected and therefore reduction in size can be realized. A current flowing into the read transistor QR is converted to the voltage on the data line and thereby the signal voltage appearing on the data line is increased. |
