发明名称 SYSTEM FOR INFORMATION PROCESSING AND METHOD THEREFOR
摘要 PROBLEM TO BE SOLVED: To provide a fail-safe information processing system and an information processing method which are small in load on software and where a general purpose CPU module can be used. SOLUTION: This information processing system adopts an output majority vote in three systems that perform the same processing. For example, in a system 2, data are read from a memory 7-2 in a CPU module by a DMA controller 8-1 and are transmitted to comparison data FIFO 8-3. In a fail-safe comparison circuit 8-6, data transferred from a system 1 and the data of the comparison data FIFO 8-3 are compared with each other. The data transferred from the system 3 are similarly compared with the data at the fail-safe comparison circuit. When data of its own local system 2 is not matched with any data of the systems 1 and 3 which are other systems, its own local system 2 is decided to be in abnormal operation and an output is changed to a safe side.
申请公布号 JP2000112777(A) 申请公布日期 2000.04.21
申请号 JP19980285492 申请日期 1998.10.07
申请人 NIPPON SIGNAL CO LTD:THE 发明人 ISHII TAKASHI
分类号 G06F11/18;B61L3/08;G05B9/03;(IPC1-7):G06F11/18 主分类号 G06F11/18
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