发明名称 ERROR RATE MEASURING APPARATUS AND OPTIMUM CLOCK PHASE DETECTION METHOD THEREFOR
摘要 PROBLEM TO BE SOLVED: To provide an error rate measuring apparatus provided with an automatic search circuit by which the unrequired measurement of an error rate can be eliminated and the time required for detecting the optimum phase of a clock minimum in the error rate can be shortened, and to provide an optimum clock phase detection method therefor. SOLUTION: As for this error rate measuring apparatus 100, by the control of a CPU 6, a processing for detecting the rough estimate value of the optimum phase of the clock to inputted data is performed first by a circuit constituted of an AND circuit 7, a low-pass filter 8 and an A/D converter 9, then the error rate is calculated for the phase near the detected rough estimate value of the optimum phase and the detection processing of the phase for turning the error rate to a minimum value is performed.
申请公布号 JP2000115139(A) 申请公布日期 2000.04.21
申请号 JP19980275767 申请日期 1998.09.29
申请人 ANDO ELECTRIC CO LTD 发明人 TOMONO NORIYUKI
分类号 H04L1/00;H04L7/00 主分类号 H04L1/00
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