| 摘要 |
PROBLEM TO BE SOLVED: To prevent the enlargement of a circuit scale by permitting a first storage element to receive input data of one bit width in an input terminal, transmitting it to an output terminal in accordance with an operation clock, changing the combination of data transmitted from the output terminal and other data, supplying it to the input terminals of a logic circuit, which are installed by a prescribed number, and transmitting a parallel output code from the logic circuit. SOLUTION: Some data of X0out-X15out are connected to the input terminals of OR circuits 42A-42P in different combinations. Either one of X0out-X15out is connected at least to one of two or more input terminals. Namely, some data of D1-D8 and X0out-X15out are connected to the plural input terminals of the OR circuits 42A-42P so as to include at least one of D1-D8 and at least one of X0out-X15out in different combinations.
|
