发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To provide a circuit system capable of reducing an area overhead by a scan circuit. SOLUTION: Scanning flip-flop circuits 11-1 to 11-j are arranged with every input terminal, output terminal and input/output terminal of respective modules 10 in an integrated circuit, and a module terminal is arranged through the flip-flop circuits 11-1 to 11-j. The respective modules 10 have shift scan circuits by connecting the flip-flop circuits 11-1 to 11-j in a chain shape at test mode time. A test of the integrated circuit is performed by shift-scanning the whole chip by connecting the shift scan circuits of the respective modules 10 in a chain shape. |
申请公布号 |
JP2000111615(A) |
申请公布日期 |
2000.04.21 |
申请号 |
JP19980279587 |
申请日期 |
1998.10.01 |
申请人 |
HITACHI LTD |
发明人 |
KUBOKI SHIGEO;NOMOTO KAZUYUKI |
分类号 |
G06F11/22;G01R31/28;H01L21/822;H01L27/04 |
主分类号 |
G06F11/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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