发明名称 DATA TRANSMISSION AND RECEPTION SYSTEM
摘要 PROBLEM TO BE SOLVED: To shorten time required for a synchronization processing in data transmission and reception by reporting the information of a reception clock synchronized with the transmission clock of a transmitter by using a phase locked loop by a receiver to the transmitter and adjusting the frequency of the transmission clock corresponding to it by the transmitter. SOLUTION: A transmission part 40 is composed of a transmission CPU 420, a memory unit 410, a transmission VCO 440, a data modulation part 430, a transmission side ROM 460 and a RAM 451. Corresponding to the transmission clock oscillated corresponding to a voltage applied to the transmission VCO 440 by the transmission CPU 420, the data modulation part 430 transmits synchronization data. For that, a printer part on a reception side executes a PLL processing, a reception VCO 833 is made to oscillate the reception clock synchronized with the transmission clock, the value of an input voltage corresponding to a reception clock frequency is reported from a reception part 80 to the transmission CPU 420 and the transmission CPU 420 compares it with an appropriate voltage value inside the transmission side ROM 460.
申请公布号 JP2000115150(A) 申请公布日期 2000.04.21
申请号 JP19980284624 申请日期 1998.10.06
申请人 MINOLTA CO LTD 发明人 TORIYAMA HIDEYUKI
分类号 H04N1/04;H04L7/00;H04L7/04 主分类号 H04N1/04
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