| 摘要 |
PROBLEM TO BE SOLVED: To provide an address arithmetic unit and an address computing method capable of improving the speed of operation, the degree of freedom for preparing a program and the application efficiency of a memory. SOLUTION: An address register value (A) 20, an addition/sub-traction offset (C) 18, a buffer area lower limit value(LB) 14, a buffer area upper limit value (LE) 12, and an addition/subtraction control signal (A/S) 16 are set up. The LE and the LB can be set up to optional values. An adder 22 calculates non- cyclic address by (A+|C|) in the case of addressing of an adding direction or by (A-|C|) in the case of addressing of a subtracting direction and an adder 24 calculates (M-1). An adder 26 calculates a cyclic address by (A+|C|)-M in the case the addressing of the adding direction or by (A-|C|)+M in the case of addressing of the subtracting direction and whether a cyclic condition is formed or not is judged by using a value calculated by an adder 28. A selector 32 selects the cyclic address when the cyclic condition or the non-cyclic address when the cyclic address is not formed as an updated value.
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