发明名称 Semiconductor memory device
摘要 <p>A switching transistor is provided which applies predetermined voltage to a plurality of word lines based on a predetermined signal from a power on reset circuit, until predetermined potential becomes stable, when the predetermined potential is applied to the bit line or to the plate line, such as at the time of power on, to connect the bit line connected to each memory cell and the memory cell capacitor, as well as applies a control signal to the gate to thereby electrically connect the bit line and the plate line. &lt;IMAGE&gt;</p>
申请公布号 EP0994486(A2) 申请公布日期 2000.04.19
申请号 EP19990308058 申请日期 1999.10.13
申请人 SHARP KABUSHIKI KAISHA 发明人 TAKATA, HIDEKAZU;MAEDA, KENGO
分类号 G11C14/00;G11C11/22;(IPC1-7):G11C11/22 主分类号 G11C14/00
代理机构 代理人
主权项
地址