发明名称 Bit error measurement system
摘要 <p>PCT No. PCT/JP96/00405 Sec. 371 Date Feb. 10, 1997 Sec. 102(e) Date Feb. 10, 1997 PCT Filed Feb. 22, 1996 PCT Pub. No. WO96/26451 PCT Pub. Date Aug. 2, 1996A bit error measurement system provides means for generating test patterns, multiplexing means and means for specifying and recording a pattern position. In a first aspect, a bit error measurement system has a pattern generator having M channels of pattern generation and a pattern generation controller 10 for controlling the pattern generation in the M channels so that when one channel is selected to generate a pattern the other channels are controlled to be waiting. In a second aspect, a clock frequency difference detector 150 is provided for counting a frequency of an input clock 111 and comparing the results with the frequency at the time of previous switching to detect whether the frequency change is greater than a predetermined value to judge whether the system is in a measurement state and to permit or prohibit a switching operation of a clock switch circuit. In a third aspect, a pattern position recording part 210 is provided to store pattern position information of a reference pattern generator 262 when an error detection signal 265a is received from a comparator 265.</p>
申请公布号 GB2340278(B) 申请公布日期 2000.04.19
申请号 GB19990024975 申请日期 1996.02.22
申请人 * ADVANTEST CORPORATION 发明人 TETSUO * SOTOME;TAKAYUKI * NAKAYIMA;KAZUTAKA * OSAWA;KOUICHI * SHIROYAMA;KAZUHIRO * SHIMAWAKI
分类号 G01R31/3181;G01R31/319;G06F1/12;G06F11/24;G06F11/273;G06F11/277;H04L1/24;(IPC1-7):G06F11/273 主分类号 G01R31/3181
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