发明名称 LAND GRID ARRAY PACKAGE AND FABRICATION METHOD THEREOF
摘要 <p>PURPOSE: A stackable land grid array package and a manufacturing method thereof are provided to allow a package stack and an easy heat dissipation. CONSTITUTION: The package includes a substrate(9) having a chip-mountable cavity(10) and bond pads(11) formed in the cavity(10), a semiconductor chip(20) having bumps(21) electrically connected to the bond pads(11) by solder cream(40), outer terminals(17) enclosing both lateral sides of the substrate(9), and a mold part(30) partially filling the cavity(10) to protect the bumps(21) and the bond pads(11). In addition, semicircular via holes are formed on the lateral sides of the substrate(9), and via lands are formed on top and bottom sides of the substrate(9) around the via holes electrically connected thereto. The respective bond pads(11) are electrically coupled to the via lands by internal conductive patterns, and the respective outer terminals(17) are formed in the via holes and protruded outward. The packages can be stacked in layers through the outer terminals(17).</p>
申请公布号 KR100253325(B1) 申请公布日期 2000.04.15
申请号 KR19970049393 申请日期 1997.09.27
申请人 HYUNDAI MICRO ELECTRONICS CO.,LTD. 发明人 JEUNG, YOUNG KIU
分类号 H01L23/50;(IPC1-7):H01L23/50 主分类号 H01L23/50
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