发明名称 METHOD FOR FORMING WIRE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for forming a multilayered interconnection of a semiconductor device is provided to reduce electromigration and to improve step coverage and isolation characteristics. CONSTITUTION: In the method, an oxide layer(2) formed on a semiconductor substrate(1) is selectively etched to form a contact hole, and a tungsten contact layer(3) is formed in the contact hole and on the oxide layer(2). Next, a TEOS-O3 layer(4) and an SOG layer(5) are sequentially deposited over the tungsten contact layer(3). Then, a portion of the SOG layer(5) is etched to expose the TEOS-O3 layer(4), and also the TEOS-O3 layer(4) is etched to expose the tungsten layer(3). Particularly, the etched width of the SOG layer(5) is greater than that of the TEOS-O3 layer(4). After that, the SOG layer(5) is contracted by O2 plasma, and the SOG layer(5) and the TEOS-O3 layer(4) are etched at edges thereof by sputtering. Thereafter, a Ti/TiN layer(7), an aluminum layer(9) and a tungsten layer(8) are sequentially formed over entire exposed surfaces and etched by CMP until the SOG layer(5) is exposed.
申请公布号 KR100253329(B1) 申请公布日期 2000.04.15
申请号 KR19970050439 申请日期 1997.09.30
申请人 HYUNDAI MICRO ELECTRONICS CO.,LTD. 发明人 KIM, PIL SEUNG
分类号 H01L21/28;(IPC1-7):H01L21/28 主分类号 H01L21/28
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