发明名称 ASYNCHRONOUS TRANSFER MODE INTERFACE CONTROL DEVICE
摘要 PURPOSE: A unilateral ATM interface apparatus is provided to enable an S1 flow function in a set-top-box by receiving high-speed down stream data via ATM. CONSTITUTION: An ATM physical layer controller(20) receives an ATM MUX packet data and outputs ATM cells including MPEG-2 transfer stream data. The first FIFO memory(24) temporarily stores the ATM cells. An ATM SAR controller(22) receives and reassembles the ATM cells to output MPEG2-TS(Transfer Stream) data. A local CPU(26) generates signals indicating to receive the next data and start data-process. A local memory(28) stores the MPEG2-TS data. An MPEG-TS interfacing timing controller(30) converts the MPEG2-TS data into an 8 bit data bus, and outputs the fourth MPEG-TS data and timing information signals in 8 bit data. A bit conversion controller(32) converts the 8 bit data bus from the local CPU into 16 and 32 bit data buses. The second FIFO memory(34) outputs the fourth MPEG2-TS data. An MPEG-TS demultiplexer(36) receives and demultiplexes the fourth MPEG2-TS data.
申请公布号 KR100253596(B1) 申请公布日期 2000.04.15
申请号 KR19970060598 申请日期 1997.11.17
申请人 KOREA ELECTRONICS TECHNOLOGY INSTITUTE 发明人 CHO, BYUNG-HAK;YOON, SUNG-HO
分类号 H04L29/10;(IPC1-7):H04L29/10 主分类号 H04L29/10
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