| 摘要 |
PURPOSE: A device for interfacing a ROM in a processor board of a communication processing system is provided to connect a 16-bit width ROM to a processor bus when a processor board is embodied using a processor no having a dynamic bus sizing function. CONSTITUTION: When a processor writes to a 16-bit width ROM, the first byte(MP_D(31..24)) of a processor data bus is selected by the first multiplexer and connected to the first byte(MP_LD(31..24)) of a local data bus through a local data buffer. The second byte(MP_D(23..16)) of a processor data bus is selected by the second multiplexer and connected to the second byte(MP_LD(23..16)) of the local data bus through the local data buffer. Because the 16-bit width ROM is connected to the first word(MP_LD(31..16)) of a local data bus, the first word(MP_D(31..16)) of the processor data bus is connected to the first word(MP_LD(31..16)) of a local data bus, and the second word(MP_D(15..0)) of the processor must be swapped for the first word(MP_LD(31..16)) of the processor data. Thus, the third byte(MP_D(15..8)) of a processor data bus is selected by the first multiplexer and connected to the first byte(MP_LD(31..24)) of a local data bus through a local data buffer. The fourth byte(MP_D(7..0)) of a processor data bus is selected by the second multiplexer and connected to the second byte(MP_LD(23..16)) of a local data bus through a local data buffer.
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