| 摘要 |
PURPOSE: A column selection line driver circuit has an improved column selection speed, and reduces a data output time from a data input/output command signal. CONSTITUTION: A column selection line driver circuit includes a column selection line driving part(40) which is enabled by a column latch signal latching a column address, and generates a column selection circuit which is disabled by a data input/output command signal being a command signal of the column address. The column selection line driving part(40) includes a master clock generator, a column address latch part, and a column selection line. The master clock generator is enabled by the column latch signal, and generates a master clock which is disabled by the data input/output command signal. The column address latch part generates an input address responsive to the column latch signal to the column address. The column decoding part inputs the master clock and the column address, and drives a column selection line corresponding to the column address. Thereby, the circuit reduces a data output time(tDAC), and improves a data reading speed.
|
