发明名称 SEMICONDUCTOR MEMORY DEVICE HAVING STATIC RANDOM ACCESS MEMORY
摘要 There is provided a technique capable of reducing the electrode resistance by widening the effective area of an electrode in a cell for a standard potential supply connected to the memory cell. There is also provided a technique capable of reducing the memory cell area by reducing the area necessary for separation between the electrode in a cell for the standard potential supply and adjacent other electrodes. Two transfer MOS transistors of a first conductivity type and two driver MOS transistors are provided. A conductive layer for fixing the source potential of the driver MOS transistors to standard potential is so disposed above the transfer and driver MOS transistors as to the wholly cover the memory cell. Separation is carried out by using a photo-mask having an optically transparent substrate provided within the same transmissive portion with a pattern of a plurality of so-called phase shifter regions for inversion of the phase of transmitting light.
申请公布号 KR100253032(B1) 申请公布日期 2000.04.15
申请号 KR19910018734 申请日期 1991.10.24
申请人 HITACHI ULSI ENGINEERING CORP.;HITACHI LTD. 发明人 YAMANAKA, TOSHIAKI;HASEGAWA, NORIO;TANAKA, TOSHIHIKO;HASHIMOTO, TAKASHI;ISHIBASHI, KOICHIRO;HASHIMOTO, NAOTAKA;SHIMIZU, AKIHIRO;SUGAWARA, YASUHIRO;KURE, TOKUO;IIJIMA, SHIMPEI;NISHIDA, TAKASHI;TAKEDA, EIJI
分类号 G03F1/29;G03F1/30;G03F1/68;H01L21/027;H01L21/8244;H01L27/11 主分类号 G03F1/29
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