HIGH SPEED PACKET SWITCH CONTROLLER USING NEURAL CHIP AND EXCHANGER USING THE CONTROLLER

摘要

PURPOSE: A high speed packet switch controller and an exchange using the same are provided to maximize a system ability by using a neural network chip technology. CONSTITUTION: A neural network chip includes a row address decoder(41), a connection ring array(42), a neural network(43), an external input/output bus, and an internal neuron data bus(INTERNAL DATA BUS). The row address decoder(41) performs a decoding of a weight row address by receiving the weight row address. The connection ring array(42) connects a signal with a neural network according to an address inputted by the row address decoder(41), and varies an output voltage according to the weight. The neural network(43) outputs a signal outputted by the connection ring array(42). The external input/output bus outputs a cross bar switch control signal(S2) generated finally through the neural network(43).