发明名称 |
PROCESSING SYSTEM HAVING MULTIPLE LEVEL CACHE MEMORY AND METHOD FOR OPERATING THE SAME |
摘要 |
PURPOSE: A processing system having a multiple level cache memory and a method for operating the same is provided to enhance an operation speed by using a first cache and a second cache built in a CPU. CONSTITUTION: A processing system having a multiple level cache memory comprises a CPU core(53), a first cache(55), a second cache(57), a CPU(51) and a main memory(65). The CPU core performs each operation and command. The first cache stores a frequently used data. The second cache stores a data not stored in the first cache. The CPU and the CPU core stores simultaneously a newly generated data to the first and the second cashes. The main memory interfaces the first and the second cashes and stores all data of the CPU core.
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申请公布号 |
KR20000020196(A) |
申请公布日期 |
2000.04.15 |
申请号 |
KR19980038687 |
申请日期 |
1998.09.18 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
KU, KYUNG HUN;HWANG, GYU CHEOL |
分类号 |
G06F12/08;(IPC1-7):G06F12/08 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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