发明名称 |
DEFECT ANALYSING METHOD OF BARE WAFER |
摘要 |
PURPOSE: A method for analyzing a defect formed on the bare wafer for semiconductor is provided to prevent an operating error from occurring in the succeeding process by performing the manufacturing process of the semiconductor in the bare wafer that is selected on the basis of the specification made by considering D-effect, the number of crystal originated particles(COP) and the break down voltage of an oxide film. CONSTITUTION: A bare wafer cut in the specific part of a silicon ingot is selected. The distribution of D-defects in the bare wafer is obtained. The distribution of COP is obtained. After an oxide film is formed on the bare wafer, the break down voltage of the oxide film is obtained. The relation of the distributions of the D-defects and the COP and the break down voltage of the oxide film is obtained.
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申请公布号 |
KR100251644(B1) |
申请公布日期 |
2000.04.15 |
申请号 |
KR19970009294 |
申请日期 |
1997.03.19 |
申请人 |
SAMSUNG ELECTRONICS CO, LTD. |
发明人 |
PARK, JAE KUN;PARK, JUNG MIN;JO, KYU CHUL;CHOI, SU YUL |
分类号 |
H01L21/66;(IPC1-7):H01L21/66 |
主分类号 |
H01L21/66 |
代理机构 |
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地址 |
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