发明名称 MULTILAYER METAL LINE OF SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME
摘要 PURPOSE: A multilayer interconnection of a semiconductor device and a method for forming the same are provided to overcome difficulty in forming a via contact. CONSTITUTION: The multilayer interconnection has sidewall spacers(28) and a tungsten via contact(29), which are used for connecting the first and second via contacts(24,32). In the method, the first metal line(22) is formed on a semiconductor substrate(21), and the first interlayer dielectric(23) is formed thereon. Next, a via hole exposing the first metal line(22) is formed in the first interlayer dielectric(23), and the first via contact(24) is formed therein. After the second metal line(25) is formed on the first interlayer dielectric(23) to expose the first via contact(24), the first and second insulating layers(26,27) are formed thereon and then etched to expose the first via contact(24). Next, the sidewall spacers(28) are formed on sides of the first and second insulating layers(26,27), and the tungsten via contact(29) is formed between the sidewall spacers(28) to make contact with the first via contact(24). Thereafter, the second interlayer dielectric(30), the second via contact(32) and the third metal line(33) are formed in sequence.
申请公布号 KR100252873(B1) 申请公布日期 2000.04.15
申请号 KR19970050128 申请日期 1997.09.30
申请人 HYUNDAI MICRO ELECTRONICS CO.,LTD. 发明人 KIM, JIN SOO
分类号 H01L21/28;(IPC1-7):H01L21/28 主分类号 H01L21/28
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