SEMICONDUCTOR POWER IC ISOLATION METHOD

摘要

PURPOSE: Device isolation structure and method of a semiconductor power integrated circuit are provided to simplify related processes and to improve breakdown voltage characteristics. CONSTITUTION: The structure includes a semiconductor substrate(31) in which a high voltage device region(31hr) and a low voltage device region(31lr) are defined, a trench(36) formed in a part of the high voltage device region(31hr) and a part of an interfacing region(31ir) between both device regions(31hr,31lr), two insulating layers(37,38) and a conductive layer(39) sequentially formed in the trench(36), and a field oxide layer(42) formed over the trench(36) and on a portion of the substrate(31). Particularly, the trench(36) is filled with a part of the field oxide layer(42a) thermally formed by a local oxidation of silicon.