| 摘要 |
PURPOSE: A multiplying digital to-analog converter is provided to reduce a nonlinear characteristic generated owing to a mismatch of a capacitor array. CONSTITUTION: A multiplying digital-to-analog converter comprises a first reference terminal(pVref) supplied with a first reference voltage and a second reference terminal(nVref) supplied with a second reference voltage. A first capacitor array has first 2¬N unit capacitors(PC1-PC15) each corresponding to all bits of a first digital data inputted from a previous analog-to-digital converter and two fixed capacitors(PCfb1,PCfb2). A first select part has 2¬N switches(PS1-PS15) which connect one ends of the first unit capacitors and the first and second reference terminals in response to the first digital data. A second capacitor array has first 2¬N unit capacitors(nC1-nC15) each corresponding to all bits of a second digital data inputted from a previous analog-to-digital converter and two fixed capacitors(nCfb1,nCfb2). A second select part has 2¬N switches(NS1-NS15) which connect one ends of the second unit capacitors and the first and second reference terminals in response to the second digital data. An operational amplifier(OP) has a first input terminal coupled to the other ends of the first unit capacitors and a second input terminal coupled to the other ends of the second unit capacitors, and amplifies a difference between a digitized value of an external analog input signal and the analog signal.
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