发明名称 |
Random access memory block circuitry for programmable logic array integrated circuit devices |
摘要 |
A relatively large block of random access memory ("RAM") may be provided on a programmable logic array integrated circuit device for use as read-only memory ("ROM") or RAM during operation of the device to perform logic. The RAM block is connected in the circuitry of the device so that it can be programmed and verified compatibly with other memory on the device. Thereafter the circuitry of the RAM block allows it to be switched over to operation as RAM or ROM during logic operation of the device. |
申请公布号 |
GB2307078(B) |
申请公布日期 |
2000.04.12 |
申请号 |
GB19960010056 |
申请日期 |
1996.05.14 |
申请人 |
* ALTERA CORPORATION;* ALTERA CORPORATION |
发明人 |
CHIAKANG * SUNG;WANLI * CHANG;JOSEPH * HUANG;RICHARD G * CLIFF |
分类号 |
G01R31/3185;G11C8/12;G11C8/16;G11C29/32;H03K19/173;H03K19/177;(IPC1-7):H03K19/177 |
主分类号 |
G01R31/3185 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|