| 摘要 |
PROBLEM TO BE SOLVED: To provide a logical simulation system for executing a quaternary simulation at a high speed. SOLUTION: The reading processing of circuit information is performed (a step 102), and a part to which it is necessary to perform an arithmetic operation is limited by using a high impudence value Z (a step 103). In this step, a gate, whose input values are the Z value and an indefinite value X and whose output values are the same, is retrieved, and a logic for converting the input of the gate from the Z value into the X value is inserted, and ternary simulation is operated to the gate, and quaternary simulation is operated to the other gates. Afterwards, a simulation code is generated (a step 105). The quaternary simulation is expressed by using each one bit of two words, and plural patterns are made correspond to each bit.
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