Operational approach for the suppression of bi-directional tunnel oxide stress of a flash cell

摘要

A method of erasing a flash memory cell to suppress bi-directional tunnel oxide stress that includes applying a negative voltage to the control gate of the flash memory cell, applying a bias voltage to the substrate of the flash memory cell and applying a bias voltage to the drain of the flash memory cell that equals the bias voltage applied to the substrate minus a fraction of a diode voltage drop across the drain junction formed between the drain and the substrate. The bias voltage applied to the drain is selected so that the drain junction is not forward biased. The fraction is in the range of 20% to 80% of the diode voltage drop.