| 摘要 |
PROBLEM TO BE SOLVED: To obtain the semiconductor memory, which can improve the miniturization of a memory cell without generating unbalance in the beta ratio of a memory cell. SOLUTION: The memory cell of SRAM has a first conducting layer 6a, a second conducting layer 16b and a third conducting layer 16c. The first conducting layers 16a become the gate electrodes of load transistor Q6 and a driver transistor Q4. The second conducting layer 16b is branched from the first conducting layer 16a on a field oxide film 13 and electrically connected to an active region 12b of driver transistor Q3. The third conducting layers 16c become the gate electrodes of a load transistor Q5 and a driver transistor Q3. The third conducting layer 16c is electrically connected to an active region 12d of the load transistor Q6. The width of the second conducting layer 16b located on the field oxide film 13 is smaller than the width of the first conducting layer 16a. |
