发明名称 Using a submicron level dimension reference
摘要 A submicron level dimension reference for use with a scanning electron microscope in a semiconductor device fabrication apparatus. The reference has a first insulating layer with a first pattern formed on a semiconductor wafer substrate. A plurality of contacts are formed between the first pattern of the first insulating layer such that the contacts directly communicate the wafer substrate. The contacts are capable of carrying an electrical charge. An electrically conductive layer is formed over the contacts and the first insulating layer. A second insulating layer with a second pattern is formed over the conductive layer. Electrical charges generated by radiating the scanning electron microscope on the submicron level dimension reference are transferred from the first and second insulating layers to the wafer substrate via the conductive layer and the plurality of contacts.
申请公布号 US6048743(A) 申请公布日期 2000.04.11
申请号 US19970906880 申请日期 1997.08.06
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 YANG, KYOUNG-MO;LEE, SANG-KIL
分类号 H01L21/66;G01B15/00;(IPC1-7):H03L23/58 主分类号 H01L21/66
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