| 摘要 |
PROBLEM TO BE SOLVED: To provide a low power consumption DRAM in which an increase in power consumption caused by a multi-bit output in a DRAM with a multi-bit output (×4,×8,...) is taken into consideration. SOLUTION: In a DRAM having (n/N) words×N bits (N=4, 8,...) arrangement comprising a plurality of address input pins, to which a row address and a column address are supplied in an address multiplexing scheme, and N I/O pins, the bit number of the row address is set to be larger than the bit number of the column address and only the column address is degenerated so as to configure a DRAM having (n/N) words×N bits arrangement. Then, data of N bits is allowed to be output from n1/2 sense amplifiers or less activated by a single memory access. Thus, the number of the sense amplifiers to be activated by a single memory access is reduced, thereby resulting in lower power consumption of a multi-bit output DRAM.
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