| 摘要 |
PROBLEM TO BE SOLVED: To increase noise margin of a dynamic circuit, through the addition of a simple circuit to the dynamic circuit. SOLUTION: This logic circuit is provided with a noise reduction NMOS transistor(TR) N2 and an inverter IV2 for controlling the TR N2, in addition to a PMOS TR P0, NNMOS TRs N0, N1 and an output buffer IV1. When the clock signal from a clock input terminal CLK is at H level and an input signal from an input terminal IN is at L level, the NMOS TR N2 is made conductive by an output signal of the inverter IV2. When a noise (at H level) is mixed in the input signal in this state, a part of the noise is discharged to ground via the NMOS TR N2 that has become conductive.
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