| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor storage for preventing erroneous write of data to a memory cell when write recovery time due to precharging is to be reduced to increase access time. SOLUTION: A row decoder 9 that is provided at an SRAM is composed of sub row decoders 9-1-9-8 corresponding to word lines WL1-WL8, inverter gates 51 and 52, and a P-channel-type transistor 53. Also, each sub row decoder is provided with an N-channel-type transistor 57. All word lines are fixed to a low level by a write recovery signal/ϕWE that is generated immediately after the data write operation of the SRAM.
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