WIRING CONDITION PROCESSING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT

摘要

PROBLEM TO BE SOLVED: To provide a wiring condition processing method that is capable of lessening power consumption and enhancing wiring channels in number. SOLUTION: A wiring condition processing section 120 obtains the delay on a virtual wiring length on the basis of arrangement information 220 on the substrate of a semiconductor device, and when the above delay exceeds a reference, information that indicate the duty factor of a wide wiring are obtained and added to path information for the formation of wiring condition information 230. A wiring processing section 130 forms wiring information 240 on the basis of the wiring condition information 230.