ASYNCHRONOUS SENSING DIFFERENTIAL LOGIC CIRCUIT

摘要

PURPOSE: Asynchronous sensing differential logic circuit is provided to diminish power consumption by applying a charge-recycling technique to an asynchronous system. CONSTITUTION: An asynchronous sensing differential logic circuit comprises: a control block (201) performing logic operation about a requirement input signal(REQIN) of the prior stage and a requirement output signal(REQOUT) for the posterior stage and generating an enable signal(Ei/Eib); a functional block(202) operating an input data according to the enable signal(Ei/Eib) of the control block and generating an enable signal(Eo/Eob) and data (Q, Qb); and a latch block(203) being triggered to requirement output signal for the posterior stage and operating the output signals(Eo/Eob)(Q, Qb) of the functional block, thereby latching the requirement output signal(REQOUT) and data (OUT) for the posterior stage.