| 摘要 |
PURPOSE: An interface logic with hardware is provided to reduce a logic with software by utilizing a programmable logic device, when a CPU(Central Processing Unit) accesses a device performing an ATMF(Asynchronous Transfer Mode Forum) 25Mbps TC + PMD function. CONSTITUTION: A utility bus interface device in an ATMF(Asynchronous Transfer Mode Forum ) system comprises: a CPU(Central Processing Unit) for generating a clock, a reset signal, an ATM(Asynchronous Transfer Mode) chip select signal, a read-write signal, an address, and data, when accessing of a device performing an ATMF 25Mbps TC + PMD function; a utility bus interface section for generating an address latch enable signal, an ATM 25 chip select signal, a read byte enable signal, write byte enable signal, an address, and data, by logically combining or by processing each signal generated from the CPU; an ATM framer for programming data along an ATM transmission format, according to each signal outputted from the utility bus interface section, and outputting the data.
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