| 摘要 |
<p>M-bit input data is converted into an n-bit code using a ROM (1) storing a table having a code group in which the number of consecutive bits "0" between bits "1", the number of consecutive bits "0" on the start side, and the number of consecutive bits "0" on the end side are constrained. A code obtained via a bit inverter (2) for inverting the last bit is input to an NRZI converter (3) where bits "0" and "1" of an NRZI pattern are respectively cumulated as "-1" and "+1" to obtain a cumulated value (DSV) by a controller (4). The controller (4) controls execution/nonexecution of inverse at an invertible position by the bit inverter (2) for the last bit of the code so as to decrease the absolute value of DSV at the next invertible position. <IMAGE></p> |
